lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20160924202502.GF16901@lukather>
Date:   Sat, 24 Sep 2016 22:25:02 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Olliver Schinagl <oliver@...inagl.nl>
Cc:     Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Chen-Yu Tsai <wens@...e.org>, linux-pwm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] pwm: sunxi: allow the pwm to finish its pulse before
 disable

Hi Oliver,

Sorry for the slow answer.

On Fri, Sep 09, 2016 at 11:01:08AM +0200, Olliver Schinagl wrote:
> > > > > *chip, struct pwm_device *pwm)
> > > > >  	spin_lock(&sun4i_pwm->ctrl_lock);
> > > > >  	val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
> > > > >  	val &= ~BIT_CH(PWM_EN, pwm->hwpwm);
> > > > > +	sun4i_pwm_writel(sun4i_pwm, val, PWM_CTRL_REG);
> > > > > +	spin_unlock(&sun4i_pwm->ctrl_lock);
> > > > > +
> > > > > +	/* Allow for the PWM hardware to finish its last
> > > > > toggle.
> > > > > The pulse
> > > > > +	 * may have just started and thus we should wait a
> > > > > full
> > > > > period.
> > > > > +	 */
> > > > > +	ndelay(pwm_get_period(pwm));
> > > > 
> > > > Can't that use the ready bit as well?
> > > It depends whatever is cheaper. If we disable the pwm, we have to
> > > commit that request to hardware first. Then we have to read back
> > > the
> > > has ready and in the strange situation it is not, wait for it to
> > > become
> > > ready?
> > 
> > If it works like you were suggesting, yes.
> > 
> > > 
> > > Also, that would mean we would loop in a spin lock, or keep
> > > setting/clearing an additional spinlock to read the ready bit.
> > 
> > You're using a spin_lock, so it's not that bad, but I was just
> > suggesting replacing the ndelay.
>
> If you say the spin_lock + wait for the ready is just as expensive as
> the ndelay, or the ndelay is less preferred, then I gladly make the
> change;

For the spin_lock part, I was just comparing it to a
spin_lock_irqsave, which is pretty expensive since it masks all the
interrupts in the system, introducing latencies.

> but I think we need the ndelay for the else where we do not
> have the ready flag (A10 or A13 iirc?)

Hmmmm, good point. But that would also apply to your second patch
then, wouldn't it?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Download attachment "signature.asc" of type "application/pgp-signature" (820 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ