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Message-Id: <87k2duaru6.fsf@linux.vnet.ibm.com>
Date: Fri, 30 Sep 2016 10:48:09 +0530
From: "Aneesh Kumar K.V" <aneesh.kumar@...ux.vnet.ibm.com>
To: zi.yan@...t.com, linux-kernel@...r.kernel.org, linux-mm@...ck.org
Cc: benh@...nel.crashing.org, mgorman@...hsingularity.net,
kirill.shutemov@...ux.intel.com, akpm@...ux-foundation.org,
dave.hansen@...ux.intel.com, n-horiguchi@...jp.nec.com,
Zi Yan <zi.yan@...rutgers.edu>
Subject: Re: [PATCH v1 12/12] mm: ppc64: Add THP migration support for ppc64.
zi.yan@...t.com writes:
> From: Zi Yan <zi.yan@...rutgers.edu>
>
> Signed-off-by: Zi Yan <zi.yan@...rutgers.edu>
> ---
> arch/powerpc/Kconfig | 4 ++++
> arch/powerpc/include/asm/book3s/64/pgtable.h | 23 +++++++++++++++++++++++
> 2 files changed, 27 insertions(+)
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 927d2ab..84ffd4c 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -553,6 +553,10 @@ config ARCH_SPARSEMEM_DEFAULT
> config SYS_SUPPORTS_HUGETLBFS
> bool
>
> +config ARCH_ENABLE_THP_MIGRATION
> + def_bool y
> + depends on PPC64 && TRANSPARENT_HUGEPAGE && MIGRATION
> +
> source "mm/Kconfig"
>
> config ARCH_MEMORY_PROBE
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index 263bf39..9dee0467 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -521,7 +521,9 @@ static inline bool pte_user(pte_t pte)
> * Clear bits not found in swap entries here.
> */
> #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
> +#define __pmd_to_swp_entry(pte) ((swp_entry_t) { pmd_val((pte)) & ~_PAGE_PTE })
> #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
> +#define __swp_entry_to_pmd(x) __pmd((x).val | _PAGE_PTE)
We definitely need a comment around that. This will work only for 64K
linux page size, on 4k we may consider it a hugepd directory entry. But
This should be ok because we support THP only with 64K linux page size.
Hence my suggestion to add proper comments or move it to right headers.
>
> #ifdef CONFIG_MEM_SOFT_DIRTY
> #define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
> @@ -662,6 +664,10 @@ static inline int pmd_bad(pmd_t pmd)
> return radix__pmd_bad(pmd);
> return hash__pmd_bad(pmd);
> }
> +static inline int __pmd_present(pmd_t pte)
> +{
> + return !!(pmd_val(pte) & _PAGE_PRESENT);
> +}
>
> static inline void pud_set(pud_t *pudp, unsigned long val)
> {
> @@ -850,6 +856,23 @@ static inline pte_t *pmdp_ptep(pmd_t *pmd)
> #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
> #define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
> #define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
> +
> +#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
> +static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
> +{
> + return pte_pmd(pte_swp_mksoft_dirty(pmd_pte(pmd)));
> +}
> +
> +static inline int pmd_swp_soft_dirty(pmd_t pmd)
> +{
> + return pte_swp_soft_dirty(pmd_pte(pmd));
> +}
> +
> +static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
> +{
> + return pte_pmd(pte_swp_clear_soft_dirty(pmd_pte(pmd)));
> +}
> +#endif
> #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
>
> #ifdef CONFIG_NUMA_BALANCING
Did we test this with Radix config ? If not I will suggest we hold off
the ppc64 patch and you can merge rest of the changes.
-aneesh
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