linux-kernel - Re: [PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre

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Message-ID: <e5782331-0dc6-9e0e-777c-372dc88f38e3@codeaurora.org>
Date:   Sat, 1 Oct 2016 11:19:43 -0400
From:   Sinan Kaya <okaya@...eaurora.org>
To:     Vinod Koul <vinod.koul@...el.com>
Cc:     dmaengine@...r.kernel.org, timur@...eaurora.org,
        devicetree@...r.kernel.org, cov@...eaurora.org, jcm@...hat.com,
        agross@...eaurora.org, arnd@...db.de,
        linux-arm-msm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Dan Williams <dan.j.williams@...el.com>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre_count
 atomic

On 10/1/2016 2:19 AM, Vinod Koul wrote:
>> Making it atomic so that it can be updated from multiple contexts.
> How is it multiple contexts? It's either existing context of MSI, not both!
> 

I was trying to mean multiple processor contexts here. The driver allocates 11
MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then, 
we have a race condition for common variables as they share the same interrupt
handler with a different cause bit. 

I will put the above description into the commit text.

-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.