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Message-ID: <20161003033923.GQ2467@localhost>
Date: Mon, 3 Oct 2016 09:09:24 +0530
From: Vinod Koul <vinod.koul@...el.com>
To: Sinan Kaya <okaya@...eaurora.org>
Cc: dmaengine@...r.kernel.org, timur@...eaurora.org,
devicetree@...r.kernel.org, cov@...eaurora.org, jcm@...hat.com,
agross@...eaurora.org, arnd@...db.de,
linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Dan Williams <dan.j.williams@...el.com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre_count
atomic
On Sat, Oct 01, 2016 at 11:19:43AM -0400, Sinan Kaya wrote:
> On 10/1/2016 2:19 AM, Vinod Koul wrote:
> >> Making it atomic so that it can be updated from multiple contexts.
> > How is it multiple contexts? It's either existing context of MSI, not both!
> >
>
> I was trying to mean multiple processor contexts here. The driver allocates 11
> MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then,
> we have a race condition for common variables as they share the same interrupt
> handler with a different cause bit.
>
> I will put the above description into the commit text.
Sounds better :)
--
~Vinod
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