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Message-ID: <20161028002548.GN26139@codeaurora.org>
Date: Thu, 27 Oct 2016 17:25:48 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Rob Herring <robh@...nel.org>
Cc: Jiancheng Xue <xuejiancheng@...ilicon.com>,
mturquette@...libre.com, mark.rutland@....com,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, bin.chen@...aro.org,
elder@...aro.org, hermit.wangheming@...ilicon.com,
yanhaifeng@...ilicon.com, wenpan@...ilicon.com
Subject: Re: [RESEND PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200
SoC
On 10/27, Rob Herring wrote:
> On Fri, Oct 21, 2016 at 09:37:10AM +0800, Jiancheng Xue wrote:
> > Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
> > Generator) module generates clock and reset signals used
> > by other module blocks on SoC.
> >
> > Signed-off-by: Jiancheng Xue <xuejiancheng@...ilicon.com>
> > ---
> > change log
> > v2:
> > - Fixed compiling error when compiled as a module.
> > - Fixed issues pointed by Stephen Boyd.
> > - Added prefix HISTB for clock index macro definitions.
>
> What Stephen asked for is send this and the Hi3516CV300 series as one
> series since there is a dependency.
Exactly. Please resend both parts, along with Rob's ack on this
one. I can review it all then and hopefully Rob will be ok with
the other binding change.
--
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