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Message-ID: <20161029150136.29fa4b7f@symphony.aura-online.co.uk>
Date: Sat, 29 Oct 2016 15:01:36 +0100
From: James Le Cuirot <chewi@...too.org>
To: Niklas Cassel <niklas.cassel@...s.com>
Cc: <jingoohan1@...il.com>, <pratyush.anand@...il.com>,
<bhelgaas@...gle.com>, Joao Pinto <jpmpinto@...il.com>,
<linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: PCI: designware: check for iATU unroll support after
initializing host
On Fri, 14 Oct 2016 23:54:55 +0200
Niklas Cassel <niklas.cassel@...s.com> wrote:
> From: Niklas Cassel <niklas.cassel@...s.com>
>
> dw_pcie_iatu_unroll_enabled reads a dbi_base register.
> Reading any dbi_base register before pp->ops->host_init has been
> called causes "imprecise external abort" on platforms like ARTPEC-6,
> where the PCIe module is disabled at boot and first enabled in
> pp->ops->host_init. Move dw_pcie_iatu_unroll_enabled to
> dw_pcie_setup_rc, since it is after pp->ops->host_init, but before
> pp->iatu_unroll_enabled is actually used.
>
> Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature")
> Signed-off-by: Niklas Cassel <niklas.cassel@...s.com>
> Acked-by: Joao Pinto <jpinto@...opsys.com>
Tested-by: James Le Cuirot <chewi@...too.org>
My Utilite Pro was failing to boot and this fixed it so thanks.
> ---
> drivers/pci/host/pcie-designware.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c
> b/drivers/pci/host/pcie-designware.c index 035f50c03281..bed19994c1e9
> 100644 --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -637,8 +637,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
> }
> }
>
> - pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
> -
> if (pp->ops->host_init)
> pp->ops->host_init(pp);
>
> @@ -809,6 +807,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
> {
> u32 val;
>
> + /* get iATU unroll support */
> + pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
> + dev_dbg(pp->dev, "iATU unroll: %s\n",
> + pp->iatu_unroll_enabled ? "enabled" : "disabled");
> +
> /* set the number of lanes */
> val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL);
> val &= ~PORT_LINK_MODE_MASK;
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