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Message-Id: <1479241644-234277-1-git-send-email-bin.gao@linux.intel.com>
Date: Tue, 15 Nov 2016 12:27:20 -0800
From: Bin Gao <bin.gao@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Ingo Molnar <mingo@...hat.com>, H Peter Anvin <hpa@...or.com>,
x86@...nel.org, Peter Zijlstra <peterz@...radead.org>,
linux-kernel@...r.kernel.org, Bin Gao <bin.gao@...el.com>
Subject: [PATCH 0/4] x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag and hardware related changes
This patch series adds X86_FEATURE_TSC_KNOWN_FREQ flag and modifies
Intel Atom SoC related TSC codes to use the new TSC_KNOWN_FREQ flag
and the existed TSC_RELIABLE flag.
Bin Gao (4):
x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag
x86/tsc: mark TSC frequency determined by CPUID as known
x86/tsc: mark Intel ATOM_GOLDMONT TSC reliable
x86/tsc: set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/tsc.c | 25 ++++++++++++++++++++++---
arch/x86/kernel/tsc_msr.c | 18 ++++++++++++++++++
arch/x86/platform/intel-mid/mfld.c | 9 +++++++--
arch/x86/platform/intel-mid/mrfld.c | 8 ++++++--
5 files changed, 54 insertions(+), 7 deletions(-)
--
1.9.1
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