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Date:   Fri, 18 Nov 2016 13:21:42 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Tan Jui Nee <jui.nee.tan@...el.com>,
        mika.westerberg@...ux.intel.com, heikki.krogerus@...ux.intel.com,
        tglx@...utronix.de, dvhart@...radead.org, mingo@...hat.com,
        hpa@...or.com, x86@...nel.org, ptyser@...-inc.com,
        lee.jones@...aro.org, linus.walleij@...aro.org
Cc:     linux-gpio@...r.kernel.org, platform-driver-x86@...r.kernel.org,
        linux-kernel@...r.kernel.org, jonathan.yong@...el.com,
        ong.hock.yu@...el.com, tony.luck@...el.com,
        wan.ahmad.zainie.wan.mohamad@...el.com, yunying.sun@...el.com
Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to
 Sideband bridge support driver for Intel SOC's

On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote:
> From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> 
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86 devices.
> 
> Signed-off-by: Yong, Jonathan <jonathan.yong@...el.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
> Changes in V11:
> 	- No change

Any particular reason you ignored my comments to v10 of this patch?

-- 
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy

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