linux-kernel - RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <0158A29DB680F54A88142ED28D55B1D008323439@PGSMSX107.gar.corp.intel.com>
Date:   Mon, 21 Nov 2016 03:52:41 +0000
From:   "Tan, Jui Nee" <jui.nee.tan@...el.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        "mika.westerberg@...ux.intel.com" <mika.westerberg@...ux.intel.com>,
        "heikki.krogerus@...ux.intel.com" <heikki.krogerus@...ux.intel.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "dvhart@...radead.org" <dvhart@...radead.org>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
        "ptyser@...-inc.com" <ptyser@...-inc.com>,
        "lee.jones@...aro.org" <lee.jones@...aro.org>,
        "linus.walleij@...aro.org" <linus.walleij@...aro.org>
CC:     "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "platform-driver-x86@...r.kernel.org" 
        <platform-driver-x86@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Yong, Jonathan" <jonathan.yong@...el.com>,
        "Yu, Ong Hock" <ong.hock.yu@...el.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        "Wan Mohamad, Wan Ahmad Zainie" 
        <wan.ahmad.zainie.wan.mohamad@...el.com>,
        "Sun, Yunying" <yunying.sun@...el.com>
Subject: RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to
 Sideband bridge support driver for Intel SOC's



> -----Original Message-----
> From: Andy Shevchenko [mailto:andriy.shevchenko@...ux.intel.com]
> Sent: Friday, November 18, 2016 7:22 PM
> To: Tan, Jui Nee <jui.nee.tan@...el.com>; mika.westerberg@...ux.intel.com;
> heikki.krogerus@...ux.intel.com; tglx@...utronix.de; dvhart@...radead.org;
> mingo@...hat.com; hpa@...or.com; x86@...nel.org; ptyser@...-inc.com;
> lee.jones@...aro.org; linus.walleij@...aro.org
> Cc: linux-gpio@...r.kernel.org; platform-driver-x86@...r.kernel.org;
> linux-kernel@...r.kernel.org; Yong, Jonathan <jonathan.yong@...el.com>;
> Yu, Ong Hock <ong.hock.yu@...el.com>; Luck, Tony <tony.luck@...el.com>;
> Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>;
> Sun, Yunying <yunying.sun@...el.com>
> Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to
> Sideband bridge support driver for Intel SOC's
> 
> On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote:
> > From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> >
> > There is already one and at least one more user coming which require
> > an access to Primary to Sideband bridge (P2SB) in order to get IO or
> > MMIO bar hidden by BIOS.
> > Create a driver to access P2SB for x86 devices.
> >
> > Signed-off-by: Yong, Jonathan <jonathan.yong@...el.com>
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> > ---
> > Changes in V11:
> > 	- No change
> 
> Any particular reason you ignored my comments to v10 of this patch?
>
Hi Andy,
I am sorry for missing your comments as the email filtered into other folder and I was not aware of that. I will applied your comments into next patch version.
 
> --
> Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> Intel Finland Oy