linux-kernel - Re: [PATCH v12 6/7] x86/arch_prctl: Add ARCH_[GET|SET]

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 22 Nov 2016 09:26:11 -0800
From:   Andy Lutomirski <luto@...capital.net>
To:     Ingo Molnar <mingo@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Jeff Dike <jdike@...toit.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        "open list:KERNEL SELFTEST FRAMEWORK" 
        <linux-kselftest@...r.kernel.org>,
        Dmitry Safonov <dsafonov@...tuozzo.com>,
        Nadav Amit <nadav.amit@...il.com>,
        Alexander Viro <viro@...iv.linux.org.uk>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        Linux FS Devel <linux-fsdevel@...r.kernel.org>,
        kvm list <kvm@...r.kernel.org>,
        "user-mode-linux-devel@...ts.sourceforge.net" 
        <user-mode-linux-devel@...ts.sourceforge.net>,
        X86 ML <x86@...nel.org>,
        "open list:USER-MODE LINUX (UML)" 
        <user-mode-linux-user@...ts.sourceforge.net>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Kyle Huey <me@...ehuey.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "Robert O'Callahan" <robert@...llahan.org>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Shuah Khan <shuah@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        David Matlack <dmatlack@...gle.com>,
        Borislav Petkov <bp@...e.de>, Len Brown <len.brown@...el.com>,
        Richard Weinberger <richard@....at>,
        "H. Peter Anvin" <hpa@...or.com>,
        Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH v12 6/7] x86/arch_prctl: Add ARCH_[GET|SET]_CPUID

On Nov 21, 2016 12:27 AM, "Ingo Molnar" <mingo@...nel.org> wrote:
>
>
> * Thomas Gleixner <tglx@...utronix.de> wrote:
>
> > On Fri, 18 Nov 2016, Ingo Molnar wrote:
> > > * Kyle Huey <me@...ehuey.com> wrote:
> > > > + if (test_tsk_thread_flag(prev_p, TIF_NOCPUID) ^
> > > > +     test_tsk_thread_flag(next_p, TIF_NOCPUID)) {
> > > > +         set_cpuid_faulting(test_tsk_thread_flag(next_p, TIF_NOCPUID));
> > > > + }
> > > > +
> > >
> > > Why not cache the required MSR value in the task struct instead?
> > >
> > > That would allow something much more obvious and much faster, like:
> > >
> > >     if (prev_p->thread.misc_features_val != next_p->thread.misc_features_val)
> > >             wrmsrl(MSR_MISC_FEATURES_ENABLES, next_p->thread.misc_features_val);
> > >
> > > (The TIF flag maintenance is still required to get into __switch_to_xtra().)
> > >
> > > It would also be easy to extend without extra overhead, should any other feature
> > > bit be added to the MSR in the future.
> >
> > I doubt that. There are feature enable bits coming up which are not related to
> > tasks.
>
> Any inefficiencies resulting from such features should IMHO be carried by those
> features, not by per task features - but:
>
> > [...] So if we have switches enabling/disabling global features, then we would
> > be forced to chase all threads in order to update all misc_features thread
> > variables. Surely not what we want to do.
>
> What switches would those be? We generally don't twiddle global CPU features post
> bootup - we pick a model on bootup and go with that.

I don't see what problem we're trying to solve here.  If we end up
with a mix of global (and changeable!) features and per-task features,
we can just do:

wrmsrl(MSR_MISC_FEATURES_ENABLES, global_misc_features_val |
next_p->thread.misc_features_val);

This is *still* way faster than rdmsr.