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Message-ID: <CAGb2v65wC_xjdx6Vk55xUPxkzg+hgi+pNF1tXhJJ53TWWHG+5Q@mail.gmail.com>
Date:   Fri, 25 Nov 2016 11:22:53 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Ondřej Jirman <megous@...ous.com>
Cc:     dev <dev@...ux-sunxi.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Jorik Jonker <jorik@...pendief.biz>,
        "open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
        "moderated list:ARM/Allwinner sunXi SoC support" 
        <linux-arm-kernel@...ts.infradead.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

On Fri, Nov 25, 2016 at 8:28 AM,  <megous@...ous.com> wrote:
> From: Ondrej Jirman <megous@...ous.com>
>
> When adjusting PLL_CPUX on H3, the PLL is temporarily driven
> too high, and the system becomes unstable (oopses or hangs).
>
> Add a notifier to avoid this situation by temporarily switching
> to a known stable 24 MHz oscillator.
>
> Signed-off-by: Ondrej Jirman <megous@...ous.com>
> Tested-by: Lutz Sammer <johns98@....net>

A Fixes tag would be nice. Otherwise,

Acked-by: Chen-Yu Tsai <wens@...e.org>

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