linux-kernel - Re: [PATCH] clk: sunxi-ng: fix PLL

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Message-ID: <20161125063546.n3s3dpxdi6ashjtq@lukather>
Date:   Fri, 25 Nov 2016 07:35:46 +0100
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     megous@...ous.com
Cc:     dev@...ux-sunxi.org, Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Jorik Jonker <jorik@...pendief.biz>,
        "open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
        "moderated list:ARM/Allwinner sunXi SoC support" 
        <linux-arm-kernel@...ts.infradead.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

On Fri, Nov 25, 2016 at 01:28:47AM +0100, megous@...ous.com wrote:
> From: Ondrej Jirman <megous@...ous.com>
> 
> When adjusting PLL_CPUX on H3, the PLL is temporarily driven
> too high, and the system becomes unstable (oopses or hangs).
> 
> Add a notifier to avoid this situation by temporarily switching
> to a known stable 24 MHz oscillator.
> 
> Signed-off-by: Ondrej Jirman <megous@...ous.com>
> Tested-by: Lutz Sammer <johns98@....net>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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