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Message-ID: <20161206145349.GN26852@two.firstfloor.org>
Date: Tue, 6 Dec 2016 06:53:49 -0800
From: Andi Kleen <andi@...stfloor.org>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
Andi Kleen <ak@...ux.intel.com>, alexander.shishkin@...el.com,
kan.liang@...el.com, stable@...r.kernel.org
Subject: Re: [PATCH] perf/x86: Fix exclusion of BTS and LBR for Goldmont
> > - if (x86_pmu.lbr_pt_coexist)
> > + if (what == x86_lbr_exclusive_pt && x86_pmu.lbr_pt_coexist)
> > return 0;
>
> This would also allow PT & BTS at the same time, is that a supported
> configuration?
Yes it is on Goldmont.
-Andi
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