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Message-ID: <CACRpkdZ_EHKn5of4b=ng82ffc-mdtZEBS+hqFAhuWY0MbdbyjA@mail.gmail.com>
Date:   Wed, 28 Dec 2016 01:22:46 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Andrew Jeffery <andrew@...id.au>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Lee Jones <lee.jones@...aro.org>,
        Joel Stanley <joel@....id.au>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 4/5] pinctrl: aspeed-g5: Add mux configuration for all pins

On Tue, Dec 20, 2016 at 8:35 AM, Andrew Jeffery <andrew@...id.au> wrote:

> The patch introducing the g5 pinctrl driver implemented a smattering of
> pins to flesh out the implementation of the core and provide bare-bones
> support for some OpenPOWER platforms and the AST2500 evaluation board.
> Now, update the bindings document to reflect the complete functionality
> and implement the necessary pin configuration tables in the driver.
>
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
> Acked-by: Joel Stanley <joel@....id.au>
> Acked-by: Rob Herring <robh@...nel.org>

Patch applied.

Yours,
Linus Walleij

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