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Message-ID: <e7e50f9f-c06a-6ce5-f00e-a5ae854a2ca0@oracle.com>
Date: Wed, 28 Dec 2016 14:26:24 -0500
From: Boris Ostrovsky <boris.ostrovsky@...cle.com>
To: Borislav Petkov <bp@...en8.de>,
Junichi Nomura <j-nomura@...jp.nec.com>
Cc: "x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Andy Lutomirski <luto@...capital.net>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>
Subject: Re: [PATCH 3/2] x86/microcode/intel: Add a helper which gives the
microcode revision
On 12/28/2016 07:53 AM, Borislav Petkov wrote:
> On Wed, Dec 28, 2016 at 12:21:20PM +0100, Borislav Petkov wrote:
>> From: Borislav Petkov <bp@...e.de>
>>
>> Intel supplies the microcode revision value in MSR 0x8b
>> (IA32_BIOS_SIGN_ID) after CPUID(1) has been executed. Execute it each
>> time before reading that MSR.
>
> And then, we can go a step further and even do a separate helper which does the
> required steps to read out the microcode revision so that we don't forget them
> next time we change the code.
>
> Provided that works for xen, though, because I need to do the native
> variants but early_init_intel() can call the paravirt *msr() versions
> and I have no idea whether that's kosher on xen pv.
>
> Boris, any objections?
I think this should work. MSR_IA32_UCODE_REV can be natively read and
written with zero without any side effects.
-boris
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