linux-kernel - Re: [PATCH] serial: 8250_lpss: Unconditionally set PCI master for Quark

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Message-ID: <1484049982.2133.5.camel@linux.intel.com>
Date:   Tue, 10 Jan 2017 14:06:22 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Jan Kiszka <jan.kiszka@...mens.com>,
        Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] serial: 8250_lpss: Unconditionally set PCI master for
 Quark

On Mon, 2017-01-09 at 18:00 +0100, Jan Kiszka wrote:
> On 2017-01-05 22:54, Andy Shevchenko wrote:
> > On Wed, Jan 4, 2017 at 10:48 PM, Jan Kiszka <jan.kiszka@...mens.com>
> > wrote:
> > > MSI needs it as well.
> > > 
> > > Should have no practical impact, though, as DMA is always
> > > available on
> > > the Quark. But given the few users of pci_alloc_irq_vectors so
> > > far, this
> > > incorrect pattern may spread otherwise.
> > > 
> > 
> > One question below.
> > 
> > Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
> > 
> > > Fixes: 3f3a46951e02 ("serial: 8250_lpss: set PCI master only for
> > > private DMA")
> > > Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
> > > ---
> > >  drivers/tty/serial/8250/8250_lpss.c | 3 ++-
> > >  1 file changed, 2 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/tty/serial/8250/8250_lpss.c
> > > b/drivers/tty/serial/8250/8250_lpss.c
> > > index f09f68a..9315197 100644
> > > --- a/drivers/tty/serial/8250/8250_lpss.c
> > > +++ b/drivers/tty/serial/8250/8250_lpss.c
> > > @@ -183,7 +183,6 @@ static void qrk_serial_setup_dma(struct
> > > lpss8250 *lpss, struct uart_port *port)
> > >         if (ret)
> > >                 return;
> > > 
> > > -       pci_set_master(pdev);
> > >         pci_try_set_mwi(pdev);
> > 
> > Does it make sense to move MWI there as well?
> 
> TBH, I didn't come across the need to enable this bit so far,
> specifically not for doing MSI transactions. Is MWI used at all for
> MSI
> (spec says that MSI is "using a PCI DWORD memory write transaction")?

No, it can't. PCIe has no MWI feature at all, but you may have MSI
there.

> That question is better answered by someone more familiar with such
> PCI
> details.

In most (modern) cases trying MWI is no-op.

So, I think you may send v2 of this with my tag without any changes in
the code. Thanks!

-- 
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy