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Message-ID: <1484215490-7494-3-git-send-email-yong.mao@mediatek.com>
Date: Thu, 12 Jan 2017 18:04:50 +0800
From: Yong Mao <yong.mao@...iatek.com>
To: Ulf Hansson <ulf.hansson@...aro.org>
CC: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Chaotian Jing <chaotian.jing@...iatek.com>,
yong mao <yong.mao@...iatek.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Eddie Huang <eddie.huang@...iatek.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Nicolas Boichat <drinkcat@...omium.org>,
Douglas Anderson <dianders@...omium.org>,
Javier Martinez Canillas <javier@....samsung.com>,
<linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <srv_heupstream@...iatek.com>
Subject: [PATCH 2/2] mmc: dt-bindings: update Mediatek MMC bindings
From: yong mao <yong.mao@...iatek.com>
Add description for hs200-cmd-int-delay
Add description for hs400-cmd-int-delay
Add description for cmd-resp-sel
Signed-off-by: Yong Mao <yong.mao@...iatek.com>
---
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
index 0120c7f..2dbb3b0 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
@@ -21,6 +21,9 @@ Optional properties:
- assigned-clocks: PLL of the source clock
- assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock
- hs400-ds-delay: HS400 DS delay setting
+- hs200-cmd-int-delay: HS200 command internal delay setting
+- hs400-cmd-int-delay: HS400 command internal delay setting
+- cmd-resp-sel: command response sample selection
Examples:
mmc0: mmc@...30000 {
@@ -38,4 +41,7 @@ mmc0: mmc@...30000 {
assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
hs400-ds-delay = <0x14015>;
+ hs200-cmd-int-delay = <26>;
+ hs400-cmd-int-delay = <14>;
+ cmd-resp-sel = <0>; /* 0: rising, 1: falling */
};
--
1.7.9.5
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