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Message-ID: <CAPDyKFpAYY6grArvLGMr7X577uLEXjnv479ML52CKfkMXxyqUw@mail.gmail.com>
Date:   Fri, 13 Jan 2017 12:23:04 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Bough Chen <haibo.chen@....com>
Cc:     Shawn Lin <shawn.lin@...k-chips.com>,
        Clemens Gruber <clemens.gruber@...ruber.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        "A.S. Dong" <aisheng.dong@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Gary Bisson <gary.bisson@...ndarydevices.com>,
        Fabio Estevam <festevam@...il.com>,
        Shawn Guo <shawnguo@...nel.org>
Subject: Re: eMMC boot problem: switch to bus width 8 ddr failed

[...]

> Hi Ulf and Shawn,
>
> Aisheng and I debug this issue these days, and we find the root cause. There are two things
> to describe.
>
> 1) voltage switch issue.  The properity "no-1-8-v" do not work for  MMC_TIMING_MMC_DDR52.
> This is another bug, we need to fix, but has no relation with the current bug.

I am working on a patch which invents MMC_CAP_3_3V_DDR and which has a
corresponding DT binding "mmc-ddr-3_3v".
Give me a day or so, then I will post it.

Likely it should help to resolve your issue, don't you think?

[...]

Kind regards
Uffe

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