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Date:   Mon, 23 Jan 2017 10:08:32 +0100
From:   Marek Szyprowski <m.szyprowski@...sung.com>
To:     Andrzej Hajda <a.hajda@...sung.com>,
        Inki Dae <inki.dae@...sung.com>,
        dri-devel@...ts.freedesktop.org,
        Krzysztof Kozlowski <krzk@...nel.org>
Cc:     Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
        Kyungmin Park <kyungmin.park@...sung.com>,
        linux-kernel@...r.kernel.org, linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v2 7/7] arm64: dts: exynos: configure TV path clocks for
 Ultra HD modes

Hi Andrzej,

On 2017-01-23 08:56, Andrzej Hajda wrote:
> Ultra HD modes requires clock ticking at increased rate.
>
> Signed-off-by: Andrzej Hajda <a.hajda@...sung.com>
> ---
>   arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++
>   1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index f120d99..4d28e93 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

I think that exynos5433-tm2-common.dtsi is a better place for such 
definitions.
They can be also moved to &cmu_disp node to match convention for the clocks
configuration used on particular board.

> @@ -764,6 +764,17 @@
>   			clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
>   				      "aclk_xiu_decon0x", "pclk_smmu_decon0x",
>   				      "sclk_decon_vclk", "sclk_decon_eclk";
> +			assigned-clocks =
> +				<&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
> +				<&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
> +				<&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
> +				<&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
> +			assigned-clock-parents =
> +				<&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
> +				<0>,
> +				<&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
> +				<&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
> +			assigned-clock-rates = <0>, <400000000>;
>   			samsung,disp-sysreg = <&syscon_disp>;
>   			interrupt-names = "fifo", "vsync", "lcd_sys";
>   			interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

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