lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 25 Jan 2017 13:33:39 -0500
From:   Sinan Kaya <okaya@...eaurora.org>
To:     Bjorn Helgaas <helgaas@...nel.org>
Cc:     linux-pci@...r.kernel.org, timur@...eaurora.org,
        cov@...eaurora.org, vikrams@...eaurora.org,
        linux-arm-msm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: enable extended tags support for PCIe endpoints

On 1/25/2017 12:49 PM, Sinan Kaya wrote:
> Hi Bjorn,
> 
> On 11/11/2016 3:58 PM, Bjorn Helgaas wrote:
>>> Is there any other feedback?
>> If this were completely safe to enable for every device that supported
>> it, why would there be an enable bit in Device Control?
>>
>> I don't know anything about extended tags, but it worries me a little
>> when there's a "go-fast" switch and no explanation about when and why
>> we might need to go slow.
>>

I tried to answer your question in the new commit message. All PCIe completers
are required to support 8 bit tags. 

Generation of 8 bit tags is optional. That's why, there is a supported and an
enable/disable bit.

> 
> I have v2 posted. Do you feel like applying to linux-next to get some testing
> exposure or do you want to tie it to some DMI so that we enable it only on
> recent HW?
> 
> Sinan
> 


-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

Powered by blists - more mailing lists