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Message-ID: <20170126235745.GI8801@codeaurora.org>
Date:   Thu, 26 Jan 2017 15:57:45 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Jerome Brunet <jbrunet@...libre.com>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Kevin Hilman <khilman@...libre.com>,
        Carlo Caione <carlo@...one.org>, linux-clk@...r.kernel.org,
        linux-amlogic@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: meson8b: fix clk81 register address

On 01/25, Jerome Brunet wrote:
> During meson8b clock probe, clk81 register address is fixed twice.
> First using the meson8b_clk_gates array, then by directly changing
> meson8b_clk81 register.
> 
> As a result meson8b_clk81.reg = HHI_MPEG_CLK_CNTL + clk_base + clk_base.
> 
> Fixed by just removing the second fixup.
> 
> Fixes: e31a1900c1ff ("meson: clk: Add support for clock gates")
> Signed-off-by: Jerome Brunet <jbrunet@...libre.com>
> ---
>  Patch based on khilman/linux-amlogic.git master branch.

The problem isn't introduced there though?

> 
>  I don't have a meson8b HW so this patch so this patch has not been
>  tested on real HW.

Applied to clk-next.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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