linux-kernel - Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions

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Date:   Wed, 25 Jan 2017 21:54:50 -0800
From:   Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To:     "H. Peter Anvin" <hpa@...or.com>
Cc:     Ingo Molnar <mingo@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Andy Lutomirski <luto@...nel.org>,
        Borislav Petkov <bp@...e.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Brian Gerst <brgerst@...il.com>,
        Chris Metcalf <cmetcalf@...lanox.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Liang Z Li <liang.z.li@...el.com>,
        Masami Hiramatsu <mhiramat@...nel.org>,
        Huang Rui <ray.huang@....com>, Jiri Slaby <jslaby@...e.cz>,
        Jonathan Corbet <corbet@....net>,
        "Michael S. Tsirkin" <mst@...hat.com>,
        Paul Gortmaker <paul.gortmaker@...driver.com>,
        Vlastimil Babka <vbabka@...e.cz>,
        Chen Yucong <slaoub@...il.com>,
        Alexandre Julliard <julliard@...ehq.org>,
        Fenghua Yu <fenghua.yu@...el.com>, Stas Sergeev <stsp@...t.ru>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Shuah Khan <shuah@...nel.org>, linux-kernel@...r.kernel.org,
        x86@...nel.org, linux-msdos@...r.kernel.org, wine-devel@...ehq.org,
        Tony Luck <tony.luck@...el.com>
Subject: Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions

On Wed, 2017-01-25 at 12:38 -0800, H. Peter Anvin wrote:
> On 01/25/17 12:23, Ricardo Neri wrote:
> > +	case UMIP_SMSW:
> > +		dummy_value = CR0_STATE;
> 
> Unless the user space process is running in 64-bit mode this value
> should be & 0xffff.

But wouldn't that prevent the bits CR0[63:16] or CR0[31:16] from being
copied when a register operand is used? According to the Intel Software
Development manual, SMSW returns 

SMSW r16 operand size 16, store CR0[15:0] in r16
SMSW r32 operand size 32, zero-extend CR0[31:0], and store in r32
SMSW r64 operand size 64, zero-extend CR0[63:0], and store in r64

The number of bytes returned by the emulated results is controlled by
the data_size variable. If it finds that the result will be saved in a
memory location, it will only copy CR0[15:0], which is the expected
behavior of SMSW if the result is to be copied in memory.

>  I'm not sure if we should even support fixing up
> UMIP instructions in 64-bit mode.

Probably not. The whole point of the emulation was to support
virtual-8086 mode and 32-bit mode.
> 
> Also, please put an explicit /* fall through */ here.

Will do.
> 
> > +	/*
> > +	 * These two instructions return a 16-bit value. We return
> > +	 * all zeros. This is equivalent to a null descriptor for
> > +	 * str and sldt.
> > +	 */
> > +	case UMIP_SLDT:
> > +	case UMIP_STR:
> > +		/* if operand is a register, it is zero-extended*/
> > +		if (X86_MODRM_MOD(insn->modrm.value) == 3) {
> > +			memset(data, 0, insn->opnd_bytes);
> > +			*data_size = insn->opnd_bytes;
> > +		/* if not, only the two least significant bytes are copied */
> > +		} else {
> > +			*data_size = 2;
> > +		}
> > +		memcpy(data, &dummy_value, sizeof(dummy_value));
> > +		break;

The code above controls how many bytes are copied as the result of SMSW.

> > +	default:
> > +		return -EINVAL;
> > +	}
> > +	return 0;
> 
> 
> > +bool fixup_umip_exception(struct pt_regs *regs)
> > +{
> > +	struct insn insn;
> > +	unsigned char buf[MAX_INSN_SIZE];
> > +	/* 10 bytes is the maximum size of the result of UMIP instructions */
> > +	unsigned char dummy_data[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
> > +#ifdef CONFIG_X86_64
> > +	int x86_64 = user_64bit_mode(regs);
> > +#else
> > +	int x86_64 = 0;
> > +#endif
> 
> Again, could we simply do:
> 
> 	if (user_64bit_mode(regs))
> 		return false;
> 
> or are there known users of these instructions *in 64-bit mode*?

I am not aware of any. In that case, I will make this code return in
this case.

Thanks and BR,
Ricardo
> 
> 	-hpa
> 
>