linux-kernel - Re: [PATCH v8 2/5] clk: x86: Add Atom PMC platform clocks

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Message-ID: <20170127002230.GX8801@codeaurora.org>
Date:   Thu, 26 Jan 2017 16:22:30 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
Cc:     linux-clk@...r.kernel.org, x86@...nel.org,
        platform-driver-x86@...r.kernel.org,
        Darren Hart <dvhart@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        alsa-devel@...a-project.org, Irina Tirdea <irina.tirdea@...el.com>,
        Michael Turquette <mturquette@...libre.com>,
        "Rafael J . Wysocki" <rjw@...ysocki.net>,
        Takashi Iwai <tiwai@...e.com>, linux-kernel@...r.kernel.org,
        linux-acpi@...r.kernel.org, Ingo Molnar <mingo@...hat.com>,
        Mark Brown <broonie@...nel.org>,
        "H . Peter Anvin" <hpa@...or.com>, Len Brown <lenb@...nel.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Vinod Koul <vinod.koul@...el.com>
Subject: Re: [PATCH v8 2/5] clk: x86: Add Atom PMC platform clocks

On 01/23, Pierre-Louis Bossart wrote:
> From: Irina Tirdea <irina.tirdea@...el.com>
> 
> The BayTrail and CherryTrail platforms provide platform clocks
> through their Power Management Controller (PMC).
> 
> The SoC supports up to 6 clocks (PMC_PLT_CLK[0..5]) with a
> frequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrail
> and a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocks
> are available for general system use, where appropriate, and each
> have Control & Frequency register fields associated with them.
> 
> Port from legacy by Pierre Bossart, integration in clock framework
> by Irina Tirdea
> 
> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
> Signed-off-by: Irina Tirdea <irina.tirdea@...el.com>
> ---

Applied to clk-next

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