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Message-ID: <CACPK8XcWri+cZ39yZYyYUb-kHM=j8yjRSh8GgcZ6CpW6=5hgMg@mail.gmail.com>
Date:   Fri, 27 Jan 2017 16:53:58 +1100
From:   Joel Stanley <joel@....id.au>
To:     Andrew Jeffery <andrew@...id.au>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        OpenBMC Maillist <openbmc@...ts.ozlabs.org>
Subject: Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

On Fri, Jan 27, 2017 at 3:24 PM, Andrew Jeffery <andrew@...id.au> wrote:
> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC doesn't exist.
>
> Add some structs to describe the varying properties of different banks
> and integrate mechanisms to deny requests for unsupported
> configurations.
>
> Signed-off-by: Andrew Jeffery <andrew@...id.au>

Acked-by: Joel Stanley <joel@....id.au>

Cheers,

Joel

> ---
>
> Since v2:
>
> Drop linux/gpio.h include and change away from using GPIOF_* macros
>
> Since v1:
>
> Fix types for for_each_clear_bit() iteration
>
>  drivers/gpio/gpio-aspeed.c | 173 +++++++++++++++++++++++++++++++++++++++++----
>  1 file changed, 159 insertions(+), 14 deletions(-)

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