linux-kernel - Re: [3/8] x86/tsc: Store and check TSC ADJUST MSR

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Message-ID: <alpine.DEB.2.20.1701301404160.3606@nanos>
Date:   Mon, 30 Jan 2017 14:04:46 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Henning Schild <henning.schild@...mens.com>
cc:     LKML <linux-kernel@...r.kernel.org>,
        Ingo Molnar <mingo@...nel.org>,
        Peter Zijlstra <a.p.zijlstra@...llo.nl>,
        Borislav Petkov <bp@...en8.de>, Yinghai Lu <yinghai@...nel.org>
Subject: Re: [3/8] x86/tsc: Store and check TSC ADJUST MSR

On Mon, 30 Jan 2017, Henning Schild wrote:
> On Mon, 30 Jan 2017 11:20:25 +0100
> Thomas Gleixner <tglx@...utronix.de> wrote:
> > There is nothing you can ever be sure about, but I doubt that the
> > ADJUST MSR is going to vanish.
> 
> That sounds very much like i expected. But assuming the MSR has come to
> stay, the problem should be solved for recent kernels and Intel-CPUs.
> 
> The AMD-Manual from 12/16 does not mention that MSR. I do not have
> access to an AMD machine. But i can only assume that bigger machines
> also suffer from async TSCs and basically all fall back to HPET.

Borislav?