[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170130202510.GP20076@art_vandelay>
Date: Mon, 30 Jan 2017 15:25:10 -0500
From: Sean Paul <seanpaul@...omium.org>
To: John Keeping <john@...anate.com>
Cc: Mark Yao <mark.yao@...k-chips.com>, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
linux-rockchip@...ts.infradead.org,
Chris Zhong <zyw@...k-chips.com>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 13/24] drm/rockchip: dw-mipi-dsi: fix escape clock rate
On Sun, Jan 29, 2017 at 01:24:33PM +0000, John Keeping wrote:
> This clock rate is derived from the PHY PLL, so it should be calculated
> dynamically. Use the same calculation as the vendor kernel to derive
> the escape clock speed.
>
Nit below, but
Reviewed-by: Sean Paul <seanpaul@...omium.org>
> Signed-off-by: John Keeping <john@...anate.com>
> Reviewed-by: Chris Zhong <zyw@...k-chips.com>
> ---
> v3:
> - Improve the commit message a bit
> - Add Chris' Reviewed-by
> Unchanged in v2
>
> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index 290282e86d16..c2e0ba96e0a0 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -710,11 +710,13 @@ static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
>
> static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
> {
Nit: It would be nice to add a comment to the effect of "You are not meant to
understand this, it comes from the vendor kernel"
> + u32 esc_clk_division = (dsi->lane_mbps >> 3) / 20 + 1;
> +
> dsi_write(dsi, DSI_PWR_UP, RESET);
> dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
> | PHY_RSTZ | PHY_SHUTDOWNZ);
> dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
> - TX_ESC_CLK_DIVIDSION(7));
> + TX_ESC_CLK_DIVIDSION(esc_clk_division));
> }
>
> static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
> --
> 2.11.0.197.gb556de5.dirty
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@...ts.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Sean Paul, Software Engineer, Google / Chromium OS
Powered by blists - more mailing lists