linux-kernel - [tip:x86/cpufeature] x86/cpufeature: Enable RING3MWAIT for Knights Mill

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Message-ID: <tip-4d8bb00604b182b62e7786bae0e58e0befeeff85@git.kernel.org>
Date:   Sat, 4 Feb 2017 15:24:58 -0800
From:   tip-bot for Piotr Luc <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, mingo@...nel.org, hpa@...or.com,
        piotr.luc@...el.com, tglx@...utronix.de
Subject: [tip:x86/cpufeature] x86/cpufeature: Enable RING3MWAIT for Knights
 Mill

Commit-ID:  4d8bb00604b182b62e7786bae0e58e0befeeff85
Gitweb:     http://git.kernel.org/tip/4d8bb00604b182b62e7786bae0e58e0befeeff85
Author:     Piotr Luc <piotr.luc@...el.com>
AuthorDate: Fri, 20 Jan 2017 14:22:37 +0100
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Sun, 5 Feb 2017 00:19:52 +0100

x86/cpufeature: Enable RING3MWAIT for Knights Mill

Enable ring 3 MONITOR/MWAIT for Intel Xeon Phi codenamed Knights Mill. We
can't guarantee that this (KNM) will be the last CPU model that needs this
hack.  But, we do recognize that this is far from optimal, and there is an
effort to ensure we don't keep doing extending this hack forever.

Signed-off-by: Piotr Luc <piotr.luc@...el.com>
Cc: Piotr.Luc@...el.com
Cc: dave.hansen@...ux.intel.com
Link: http://lkml.kernel.org/r/1484918557-15481-6-git-send-email-grzegorz.andrejczuk@intel.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 arch/x86/kernel/cpu/intel.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index da2401a..a4c4ff9 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -79,8 +79,15 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
 	 * Ring 3 MONITOR/MWAIT feature cannot be detected without
 	 * cpu model and family comparison.
 	 */
-	if (c->x86 != 6 || c->x86_model != INTEL_FAM6_XEON_PHI_KNL)
+	if (c->x86 != 6)
 		return;
+	switch (c->x86_model) {
+	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
+		break;
+	default:
+		return;
+	}
 
 	if (ring3mwait_disabled) {
 		msr_clear_bit(MSR_MISC_FEATURE_ENABLES,