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Message-ID: <20170220112844.GN6536@twins.programming.kicks-ass.net>
Date: Mon, 20 Feb 2017 12:28:44 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Stafford Horne <shorne@...il.com>
Cc: Stephen Rothwell <sfr@...b.auug.org.au>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...e.hu>, "H. Peter Anvin" <hpa@...or.com>,
linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
Frederic Weisbecker <fweisbec@...il.com>,
Stefan Kristiansson <stefan.kristiansson@...nalahti.fi>
Subject: Re: linux-next: manual merge of the tip tree with the openrisc tree
On Mon, Feb 20, 2017 at 12:18:05PM +0100, Peter Zijlstra wrote:
> On Sun, Feb 19, 2017 at 04:26:54PM +0900, Stafford Horne wrote:
> > On Fri, Feb 17, 2017 at 12:43:21PM +1100, Stephen Rothwell wrote:
> > > Hi all,
> > >
> > > Today's linux-next merge of the tip tree got a conflict in:
> > >
> > > arch/openrisc/include/asm/Kbuild
> > >
> > > between commit:
> > >
> > > 157e82f58007 ("openrisc: add cmpxchg and xchg implementations")
>
> *groan* branch delay slots...
>
>
> It it typically recommended to implement 1 and 2 byte versions as well.
> If the architecture doesn't support these natively, you can easily
> implement them with the 4 byte ll/sc and simply retain the other bits.
While there; I spotted commit 8ffa662370f0 ("openrisc: add optimized
atomic operations") which doesn't make any kind of sense to me.
Have you actually read the asm-generic/atomic.h file you're including?
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