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Message-ID: <BD6459BE-FD6C-44F1-B9C0-6AF137AF37A4@zytor.com>
Date: Mon, 20 Feb 2017 14:23:20 -0800
From: hpa@...or.com
To: Paolo Bonzini <pbonzini@...hat.com>,
Andy Lutomirski <luto@...capital.net>
CC: kvm list <kvm@...r.kernel.org>, linux-kernel@...r.kernel.org,
X86 ML <x86@...nel.org>, Borislav Petkov <bpetkov@...e.de>
Subject: Re: RFC: Getting rid of LTR in VMX
On February 20, 2017 2:02:53 PM PST, Paolo Bonzini <pbonzini@...hat.com> wrote:
>
>> > Yes. But 150-200 clock cycles are nothing compared to the cache
>misses
>> > you get from preemption, so I'd ignore that. Saving 300 clock
>cycles on
>> > userspace exits from TR+GSBASE would be about 5% on my Haswell.
>>
>> That's still 5% :)
>
>Yes, 5% on userspace exits is good (though they're rare).
>
>OTOH, 300 clock cycles on preemption are nothing to write home about.
>
>Paolo
Oh, I would say it is... especially when it's basically free.
--
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