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Message-ID: <58AD26B7.5070602@redhat.com>
Date:   Wed, 22 Feb 2017 13:50:47 +0800
From:   Xunlei Pang <xpang@...hat.com>
To:     "Luck, Tony" <tony.luck@...el.com>,
        "xlpang@...hat.com" <xlpang@...hat.com>,
        Borislav Petkov <bp@...en8.de>
Cc:     Prarit Bhargava <prarit@...hat.com>,
        Kiyoshi Ueda <k-ueda@...jp.nec.com>,
        Peter Zijlstra <peterz@...radead.org>,
        "x86@...nel.org" <x86@...nel.org>,
        "kexec@...ts.infradead.org" <kexec@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Ingo Molnar <mingo@...hat.com>,
        Junichi Nomura <j-nomura@...jp.nec.com>,
        Naoya Horiguchi <n-horiguchi@...jp.nec.com>,
        Dave Young <dyoung@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH] x86/mce: Keep quiet in case of broadcasted mce after
 system panic

On 02/22/2017 at 02:20 AM, Luck, Tony wrote:
>> It's from my understanding, I didn't get the explicit description from the intel SDM on this point.
>> If a broadcast SRAO comes on real hardware, will MSR_IA32_MCG_STATUS of each cpu have MCG_STATUS_RIPV bit set?
> MCG_STATUS is a per-thread MSR and will contain the status appropriate for that thread when #MC is delivered.
> So the RIPV bit will be set if, and only if, the thread saved a valid return address for this exception. The net result
> is that it is almost always set for "innocent bystander" CPUs that were dragged into the exception handler because
> of a broadcast #MC. We make the test because if it isn't set, then the do_machine_check() had better not return
> because we have no idea where it will return to - since there is not a valid return IP.
>

Got it, thanks for the details.

Regards,
Xunlei

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