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Message-ID: <CALCETrV9dti=LWKGiEh5d0iF8a15q3ibVNUFVcwT7cuEJKNeJQ@mail.gmail.com>
Date: Wed, 22 Feb 2017 07:17:23 -0800
From: Andy Lutomirski <luto@...capital.net>
To: Paolo Bonzini <pbonzini@...hat.com>
Cc: Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>,
kvm list <kvm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Borislav Petkov <bpetkov@...e.de>,
Thomas Garnier <thgarnie@...gle.com>,
Jim Mattson <jmattson@...gle.com>
Subject: Re: [PATCH v2 0/7] KVM TSS cleanups and speedups
On Wed, Feb 22, 2017 at 7:13 AM, Paolo Bonzini <pbonzini@...hat.com> wrote:
> On 21/02/2017 20:14, Andy Lutomirski wrote:
>> The first four patches here are intended to be straightforward
>> cleanups and to make a better base for Thomas' GDT series. They may
>> be a slight speedup, too, because they remove an STR instruction
>> from the VMX entry path.
>>
>> The last two patches are a reasonably large speedup but need careful
>> review.
>>
>> FWIW, I can see lots of additional easy-ish speedups here. For example:
>>
>> - The GDT reload on VM exit isn't really needed at all. Instead let's
>> just change the kernel limit to 0xFFFF. Doing that naively would
>> waste memory, but doing it carefully on top of Thomas' series would
>> be straightforward and almost free.
>>
>> - RDMSR from MSR_GS_BASE is totally pointless.
>>
>> - Once I or someone finishes the FSGSBASE series, we get a big speedup
>> there.
>>
>> - The LDT reload code should be split up and optimized better, I think.
>>
>> Changes from v1:
>> - Fix some changelog typos.
>> - Fix the bug that Paolo found.
>> - Rename the helpers to make their usage more obvious.
>> - Move clearing __tss_limit_invalid into force_reload_TR() as a tiny
>> optimization.
>> - Add a test case. It doesn't test all the machinations, but at least
>> it checks basic functionality.
>>
>> Andy Lutomirski (7):
>> x86/asm: Define the kernel TSS limit in a macro
>> x86/kvm/vmx: Don't fetch the TSS base from the GDT
>> x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels
>> x86/kvm/vmx: Simplify segment_base()
>> x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss
>> x86/kvm/vmx: Defer TR reload after VM exit
>> selftests/x86: Add a basic selftest for ioperm
>>
>> arch/x86/include/asm/desc.h | 62 +++++++++++--
>> arch/x86/include/asm/processor.h | 12 ++-
>> arch/x86/kernel/ioport.c | 11 +++
>> arch/x86/kernel/process.c | 10 ++
>> arch/x86/kvm/vmx.c | 63 ++++++-------
>> tools/testing/selftests/x86/Makefile | 2 +-
>> tools/testing/selftests/x86/ioperm.c | 171 +++++++++++++++++++++++++++++++++++
>> 7 files changed, 284 insertions(+), 47 deletions(-)
>> create mode 100644 tools/testing/selftests/x86/ioperm.c
>>
>
> I pushed and tagged before seeing this v2. :( The differences seem to
> be x86-only, so I suppose Ingo can handle them if you resubmit.
>
I renamed the helpers to make it less likely that someone would repeat
my little buglet. I can submit a patch that just has the differences,
but I think it should go in through your tree. Would that work?
--Andy
--
Andy Lutomirski
AMA Capital Management, LLC
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