linux-kernel - [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node

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Message-Id: <1488763778-27499-2-git-send-email-daniel.meng@rock-chips.com>
Date:   Mon,  6 Mar 2017 09:29:36 +0800
From:   Meng Dongyang <daniel.meng@...k-chips.com>
To:     robh+dt@...nel.org, mark.rutland@....com, geert+renesas@...der.be,
        yoshihiro.shimoda.uh@...esas.com,
        martin.blumenstingl@...glemail.com, devicetree@...r.kernel.org,
        kishon@...com, linux-kernel@...r.kernel.org, heiko@...ech.de
Cc:     linux-usb@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        huangtao@...k-chips.com, kever.yang@...k-chips.com,
        william.wu@...k-chips.com, frank.wang@...k-chips.com,
        daniel.meng@...k-chips.com
Subject: [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node

On some platform such as RK3328, the 480m clock may need to assign
clock parent in dts in stead of clock driver. So this patch add
property of assigned-clocks and assigned-clock-parents to assign
parent for 480m clock.

Changes in v2:
 - move usb2-phy grf specification to grf.txt
Changes in v3: None

Signed-off-by: Meng Dongyang <daniel.meng@...k-chips.com>
---
 Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
index 3c29c77..e71a8d2 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
@@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
 
 Required properties (phy (parent) node):
  - compatible : should be one of the listed compatibles:
+	* "rockchip,rk3328-usb2phy"
 	* "rockchip,rk3366-usb2phy"
 	* "rockchip,rk3399-usb2phy"
  - reg : the address offset of grf for usb-phy configuration.
@@ -11,6 +12,11 @@ Required properties (phy (parent) node):
 Optional properties:
  - clocks : phandle + phy specifier pair, for the input clock of phy.
  - clock-names : input clock name of phy, must be "phyclk".
+ - assigned-clocks : phandle of usb 480m clock.
+ - assigned-clock-parents : parent of usb 480m clock, select between
+		 usb-phy output 480m and xin24m.
+		 Refer to clk/clock-bindings.txt for generic clock
+		 consumer properties.
 
 Required nodes : a sub-node is required for each port the phy provides.
 		 The sub-node name is used to identify host or otg port,
-- 
1.9.1