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Message-ID: <1658444.PfTs9q7449@diego>
Date: Mon, 06 Mar 2017 05:21:28 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Meng Dongyang <daniel.meng@...k-chips.com>
Cc: robh+dt@...nel.org, mark.rutland@....com, geert+renesas@...der.be,
yoshihiro.shimoda.uh@...esas.com,
martin.blumenstingl@...glemail.com, devicetree@...r.kernel.org,
kishon@...com, linux-kernel@...r.kernel.org,
linux-usb@...r.kernel.org, linux-rockchip@...ts.infradead.org,
huangtao@...k-chips.com, kever.yang@...k-chips.com,
william.wu@...k-chips.com, frank.wang@...k-chips.com
Subject: Re: [PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328
Am Montag, 6. März 2017, 09:29:38 CET schrieb Meng Dongyang:
> Add usb2-phy config information in the data of match table for
> rk3328.
>
> Changes in v2:
> - add support of otg port
> Changes in v3:
> - remove tuning function and id pin configs
>
> Signed-off-by: Meng Dongyang <daniel.meng@...k-chips.com>
I didn't double check every individual register value, but overall this looks
correct, so
Reviewed-by: Heiko Stuebner <heiko@...ech.de>
> ---
> drivers/phy/phy-rockchip-inno-usb2.c | 44
> ++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/phy/phy-rockchip-inno-usb2.c
> b/drivers/phy/phy-rockchip-inno-usb2.c index 4ea95c2..257c5d9 100644
> --- a/drivers/phy/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/phy-rockchip-inno-usb2.c
> @@ -1141,6 +1141,49 @@ static int rockchip_usb2phy_probe(struct
> platform_device *pdev) return ret;
> }
>
> +static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
> + {
> + .reg = 0x100,
> + .num_ports = 2,
> + .clkout_ctl = { 0x108, 4, 4, 1, 0 },
> + .port_cfgs = {
> + [USB2PHY_PORT_OTG] = {
> + .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 },
> + .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
> + .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
> + .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
> + .ls_det_en = { 0x0110, 0, 0, 0, 1 },
> + .ls_det_st = { 0x0114, 0, 0, 0, 1 },
> + .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
> + .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
> + .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
> + .utmi_ls = { 0x0120, 5, 4, 0, 1 },
> + },
> + [USB2PHY_PORT_HOST] = {
> + .phy_sus = { 0x104, 15, 0, 0, 0x1d1 },
> + .ls_det_en = { 0x110, 1, 1, 0, 1 },
> + .ls_det_st = { 0x114, 1, 1, 0, 1 },
> + .ls_det_clr = { 0x118, 1, 1, 0, 1 },
> + .utmi_ls = { 0x120, 17, 16, 0, 1 },
> + .utmi_hstdet = { 0x120, 19, 19, 0, 1 }
> + }
> + },
> + .chg_det = {
> + .opmode = { 0x0100, 3, 0, 5, 1 },
> + .cp_det = { 0x0120, 24, 24, 0, 1 },
> + .dcp_det = { 0x0120, 23, 23, 0, 1 },
> + .dp_det = { 0x0120, 25, 25, 0, 1 },
> + .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
> + .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
> + .idp_src_en = { 0x0108, 9, 9, 0, 1 },
> + .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
> + .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
> + .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
> + },
> + },
> + { /* sentinel */ }
> +};
> +
> static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
> {
> .reg = 0x700,
> @@ -1223,6 +1266,7 @@ static int rockchip_usb2phy_probe(struct
> platform_device *pdev) };
>
> static const struct of_device_id rockchip_usb2phy_dt_match[] = {
> + { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
> { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
> { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
> {}
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