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Message-ID: <CA+55aFyxvUx0J=p8jh8N1a80Vt+f6M-rg=L3zxyiv69bOYhkKQ@mail.gmail.com>
Date: Thu, 9 Mar 2017 09:48:20 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Daniel Borkmann <daniel@...earbox.net>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Kees Cook <keescook@...omium.org>,
Laura Abbott <labbott@...hat.com>,
Ingo Molnar <mingo@...nel.org>, Peter Anvin <hpa@...or.com>,
Fengguang Wu <fengguang.wu@...el.com>,
Network Development <netdev@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>, LKP <lkp@...org>,
ast@...com, "the arch/x86 maintainers" <x86@...nel.org>,
"David S. Miller" <davem@...emloft.net>
Subject: Re: [net/bpf] 3051bf36c2 BUG: unable to handle kernel paging request
at 0000a7cf
On Thu, Mar 9, 2017 at 6:53 AM, Daniel Borkmann <daniel@...earbox.net> wrote:
>
> Fwiw, I tried switching from using cr4
> (__native_flush_tlb_global_irq_disabled())
> to slower cr3 (__native_flush_tlb()) in "-cpu kvm64" mode, and it looks like
> it also lets all test cases pass (rodata_test, test_setmem, test_bpf), no
> corruption happening, etc.
Ok. I think this is conclusive: the qemu "-cpu kvm64" case is
definitely broken, since changing CR4.PGE is definitely
architecturally defined to flush all TLB entries.
This is not a guest kernel bug.
Of course, the bug may still be in the *host* kernel. Maybe the
emulation does something wrong. I see
if (((cr4 ^ old_cr4) & pdptr_bits) ||
(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
kvm_mmu_reset_context(vcpu);
(where pdptr_bits includes the PGE bit), but I'm not sure if emulation
is supposed to do something else too.
Linus
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