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Message-ID: <20170320080659.GA20257@verge.net.au>
Date: Mon, 20 Mar 2017 09:07:01 +0100
From: Simon Horman <horms@...ge.net.au>
To: Stephen Rothwell <sfr@...b.auug.org.au>
Cc: Russell King <rmk@...linux.org.uk>, linux-next@...r.kernel.org,
linux-kernel@...r.kernel.org,
Chris Brandt <chris.brandt@...esas.com>
Subject: Re: linux-next: manual merge of the renesas tree with the arm tree
On Mon, Mar 20, 2017 at 10:04:11AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the renesas tree got a conflict in:
>
> arch/arm/boot/dts/r7s72100.dtsi
>
> between commit:
>
> f08578e6da96 ("ARM: 8661/1: dts: r7s72100: add l2 cache")
>
> from the arm tree and commit:
>
> 69ed50de582e ("ARM: dts: r7s72100: Add watchdog timer")
>
> from the renesas tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
Thanks Stephen,
this looks correct to me.
> diff --cc arch/arm/boot/dts/r7s72100.dtsi
> index 1cf2bd038090,9b12d73e67dc..000000000000
> --- a/arch/arm/boot/dts/r7s72100.dtsi
> +++ b/arch/arm/boot/dts/r7s72100.dtsi
> @@@ -369,16 -371,13 +372,23 @@@
> <0xe8202000 0x1000>;
> };
>
> + L2: cache-controller@...ff000 {
> + compatible = "arm,pl310-cache";
> + reg = <0x3ffff000 0x1000>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + arm,early-bresp-disable;
> + arm,full-line-zero-disable;
> + cache-unified;
> + cache-level = <2>;
> + };
> +
> + wdt: watchdog@...e0000 {
> + compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
> + reg = <0xfcfe0000 0x6>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&p0_clk>;
> + };
> +
> i2c0: i2c@...ee000 {
> #address-cells = <1>;
> #size-cells = <0>;
>
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