lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 24 Mar 2017 14:31:28 +0800
From:   陈亮 <cl@...k-chips.com>
To:     Heiko Stübner <heiko@...ech.de>
Cc:     robh+dt@...nel.org, mark.rutland@....com, zhengxing@...k-chips.com,
        andy.yan@...k-chips.com, jay.xu@...k-chips.com,
        matthias.bgg@...il.com, paweljarosz3691@...il.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        wsa@...-dreams.de, linux-i2c@...r.kernel.org, jic23@...nel.org,
        knaack.h@....de, lars@...afoo.de, pmeerw@...erw.net,
        wxt@...k-chips.com, david.wu@...k-chips.com,
        linux-iio@...r.kernel.org, shawn.lin@...k-chips.com,
        akpm@...ux-foundation.org, dianders@...omium.org,
        yamada.masahiro@...ionext.com, catalin.marinas@....com,
        will.deacon@....com, afaerber@...e.de, shawnguo@...nel.org,
        khilman@...libre.com, arnd@...db.de, fabio.estevam@....com,
        zhangqing@...k-chips.com, kever.yang@...k-chips.com,
        tony.xie@...k-chips.com, huangtao@...k-chips.com,
        yhx@...k-chips.com, rocky.hao@...k-chips.com
Subject: Re: [PATCH v2 4/6] arm64: dts: rockchip: add core dtsi file for
 RK3328 SoCs

Hi, Heiko:

在 2017年03月23日 11:33, 陈亮 写道:
> Hi, Heiko
>
> 在 2017年03月21日 16:55, Heiko Stübner 写道:
>> Hi,
>>
>> Am Donnerstag, 16. März 2017, 21:17:22 CET schrieb cl@...k-chips.com:
>>> +        assigned-clock-parents =
>>> +            <&cru HDMIPHY>, <&cru PLL_APLL>,
>>> +            <&cru PLL_GPLL>, <&xin24m>,
>>> +            <&xin24m>, <&xin24m>;
>>> +        assigned-clock-rates =
>>> +            <0>, <61440000>,
>>> +            <0>, <24000000>,
>>> +            <24000000>, <24000000>,
>>> +            <15000000>, <15000000>,
>>> +            <100000000>, <100000000>,
>>> +            <100000000>, <100000000>,
>>> +            <50000000>, <100000000>,
>>> +            <100000000>, <100000000>,
>>> +            <50000000>, <50000000>,
>>> +            <50000000>, <50000000>,
>>> +            <24000000>, <600000000>,
>>> +            <491520000>, <1200000000>,
>>> +            <150000000>, <75000000>,
>>> +            <75000000>, <150000000>,
>>> +            <75000000>, <75000000>,
>>> +            <300000000>, <100000000>,
>>> +            <300000000>, <200000000>,
>>> +            <400000000>, <500000000>,
>>> +            <200000000>, <300000000>,
>>> +            <300000000>, <250000000>,
>>> +            <200000000>, <100000000>,
>>> +            <24000000>, <100000000>,
>>> +            <150000000>, <50000000>,
>>> +            <32768>, <32768>;
>>> +    };
>>> +
>>> +    gmac2io: eth@...40000 {
>> phandle should be gmac instead?
>> Node name, ethernet@...40000
> RK3328 have another gmac channel with PHY in the soc, so gmac2io mean 
> the channel with the PHY outside, and it is also called gmac2io in the 
> TRM.
So we remain gmac2io, or you have other idea?
>>
>>
>> Heiko
>>
>


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ