linux-kernel - RE: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI

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Message-ID: <alpine.DEB.2.20.1703281901300.3616@nanos>
Date:   Tue, 28 Mar 2017 19:03:07 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     "Liang, Kan" <kan.liang@...el.com>
cc:     "peterz@...radead.org" <peterz@...radead.org>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "bp@...en8.de" <bp@...en8.de>, "acme@...nel.org" <acme@...nel.org>,
        "eranian@...gle.com" <eranian@...gle.com>,
        "jolsa@...nel.org" <jolsa@...nel.org>,
        "ak@...ux.intel.com" <ak@...ux.intel.com>
Subject: RE: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on
 SMI

On Tue, 28 Mar 2017, Liang, Kan wrote:
> > On Mon, 27 Mar 2017, kan.liang@...el.com wrote:
> > 	put_online_cpus();
> > 
> > Aside of that, when this is set to SMI freeze, what causes a CPU which
> > comes online after that point to set the bit as well? Nothing AFAICT.
> 
> I've patched the intel_pmu_cpu_starting.
> I think it guarantees that the new online CPU is set.

Only when the hotplug protection of the write is in place.....

> @@ -3174,6 +3174,11 @@ static void intel_pmu_cpu_starting(int cpu)
>  
>  	cpuc->lbr_sel = NULL;
>  
> +	if (x86_pmu.attr_freeze_on_smi)
> +		msr_set_bit_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);

Can you please use brackets and line breaks?

Thanks,

	tglx