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Message-ID: <CAEnQRZD0LuUiULNrv6RJQsr8ZZE+v2-qNC1Za9vXk5+TtB0dOw@mail.gmail.com>
Date:   Mon, 3 Apr 2017 16:16:23 +0300
From:   Daniel Baluta <daniel.baluta@...il.com>
To:     Zidan Wang <b50113@...escale.com>
Cc:     Mark Brown <broonie@...nel.org>,
        Zidan Wang <zidan.wang@...escale.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Jaroslav Kysela <perex@...ex.cz>, tiwai@...e.de,
        Lars-Peter Clausen <lars@...afoo.de>,
        Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>,
        patches@...nsource.wolfsonmicro.com, alsa-devel@...a-project.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        shengjiu.wang@....com, mihai.serban@....com, viorel.suman@....com
Subject: Re: [alsa-devel][PATCH v2 2/2] ASoC: wm8960: Let wm8960 driver
 configure its bit clock and frame clock

On Thu, Jan 15, 2015 at 3:34 PM, Zidan Wang <b50113@...escale.com> wrote:
> On Wed, Jan 14, 2015 at 07:27:03PM +0000, Mark Brown wrote:
>> On Wed, Jan 07, 2015 at 03:31:45PM +0800, Zidan Wang wrote:
>>
>> > +   for (i = 0; i < ARRAY_SIZE(dac_divs); ++i) {
>> > +           if (wm8960->sysclk == lrclk * dac_divs[i]) {
>> > +                   for (j = 0; j < ARRAY_SIZE(bclk_divs); ++j) {
>> > +                           if (wm8960->sysclk ==  wm8960->bclk *
>> > +                                           bclk_divs[j] / 10) {
>> > +                                   goto config_clock;
>> > +                           }
>> > +                   }
>> > +           }
>> > +   }
>> > +
>> > +   dev_err(codec->dev, "Unsupported sysclk %d\n", wm8960->sysclk);
>> > +   return;
>>
>> It's a bit awkward using the goto like this.  A more common way of
>> writing this is to change the above block to be
>>
>>       if (i == ARRAY_SIZE(dac_divs))
>>               /* return error */
>>
>> rather than skipping over the error.  Otherwise this looks good.
>
> Hi Mark,
>
> I found it can't generate bclk for S20_3LE data format.
>
> For 2 channel S20_3LE data format:
>
> bclk = fs * 20 * 2
> Sysclk = BCLKDIV * bclk = BCLKDIV * fs * 40
> Sysclk = DACDIV * fs * 256
>
> BCLKDIV/DACDIV = 256/40 = 32/5
>
> But BCLKDIV/DACDIV can't be 32/5. So I want to support tdm slot.
>
> bclk = fs * slot_width * slots * channal.
>
> Do you think it make sense, or any other ideas?

Reviving this question after two years :).

After "ASoC: codec: wm8960: Relax bit clock computation" patch

https://patchwork.kernel.org/patch/9636769/

we can now support S20_3LE for round rates like 8000, 16000,
32000 and 48000.

But not for 11025, 22050, 441000. Do you think it's worth exploring
"tdm slot" idea? I don't know exactly what it implies.

Another idea, is to completely remove support for S20_3LE since it
is not trivial to derive bitclk from sysclk.

What do you guys think?

Daniel.

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