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Date:   Wed, 5 Apr 2017 10:02:03 +0100
From:   Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
To:     Daniel Baluta <daniel.baluta@....com>
CC:     <alsa-devel@...a-project.org>, <lgirdwood@...il.com>,
        <broonie@...nel.org>, <perex@...ex.cz>, <tiwai@...e.com>,
        <linux-kernel@...r.kernel.org>,
        <patches@...nsource.wolfsonmicro.com>, <shengjiu.wang@....com>,
        <viorel.suman@....com>, <mihai.serban@....com>
Subject: Re: [PATCH 2/2] ASoC: codec: wm8960: Relax bit clock computation
 when using PLL

On Tue, Apr 04, 2017 at 07:45:14PM +0300, Daniel Baluta wrote:
> Bitclk is derived from sysclk using bclk_divs.
> Sysclk can be derived in two ways:
> 	(1) directly from MLCK
> 	(2) MCLK via PLL
> 
> Commit 3c01b9ee2ab9d0d ("ASoC: codec: wm8960: Relax bit clock computation")
> relaxed bitclk computation when sysclk is directly derived from MCLK.
> 
> Lets do the same thing when sysclk is derived via PLL.
> 
> Signed-off-by: Daniel Baluta <daniel.baluta@....com>
> ---

Acked-by: Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>

Thanks,
Charles

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