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Message-ID: <CANk1AXTBhF64dxnPo9GtgXFjAAavRfDTZnfWYxh73vRz5VwowA@mail.gmail.com>
Date:   Tue, 11 Apr 2017 09:27:03 -0500
From:   Alan Tull <atull@...nel.org>
To:     Tobias Klauser <tklauser@...tanz.ch>
Cc:     Moritz Fischer <moritz.fischer@...us.com>,
        linux-fpga@...r.kernel.org,
        linux-kernel <linux-kernel@...r.kernel.org>,
        matthew.gerlach@...ux.intel.com
Subject: Re: [PATCH] fpga: allow to compile-test Altera FPGA bridge drivers

On Tue, Apr 11, 2017 at 4:22 AM, Tobias Klauser <tklauser@...tanz.ch> wrote:

Hi Tobias,

Thanks for your fixes that you have been sending.  I disagree with
this particular one (see below), but I appreciate your efforts.

> Add COMPILE_TEST to the Kconfig entries for the Altera SoCFPGA FPGA
> Bridge and the Altera FPGA Freeze Bridge drivers to allow test-compiling
> them on other architectures.
>
> Signed-off-by: Tobias Klauser <tklauser@...tanz.ch>
> ---
>  drivers/fpga/Kconfig | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> index 161ba9dccede..38ab05d261bf 100644
> --- a/drivers/fpga/Kconfig
> +++ b/drivers/fpga/Kconfig
> @@ -69,14 +69,14 @@ config FPGA_BRIDGE
>
>  config SOCFPGA_FPGA_BRIDGE
>         tristate "Altera SoCFPGA FPGA Bridges"
> -       depends on ARCH_SOCFPGA && FPGA_BRIDGE
> +       depends on (ARCH_SOCFPGA || COMPILE_TEST) && FPGA_BRIDGE

It doesn't make sense to compile test these on other arch's.
The bridges enabled by this only appear on Cyclone 5 SoCFPGA parts.

>         help
>           Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
>           devices.
>
>  config ALTERA_FREEZE_BRIDGE
>         tristate "Altera FPGA Freeze Bridge"
> -       depends on ARCH_SOCFPGA && FPGA_BRIDGE
> +       depends on (ARCH_SOCFPGA || COMPILE_TEST) && FPGA_BRIDGE

These bridges can be used on Altera PCIe FPGA's.  So this shouldn't
have been dependent on ARCH_SOCFPGA in the first place.

Alan

>         help
>           Say Y to enable drivers for Altera FPGA Freeze bridges.  A
>           freeze bridge is a bridge that exists in the FPGA fabric to
> --
> 2.12.2
>
>

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