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Message-ID: <20170418070016.qsng3qtk76bqxyc5@lukather>
Date: Tue, 18 Apr 2017 09:00:16 +0200
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Icenowy Zheng <icenowy@...c.io>
Cc: Lee Jones <lee.jones@...aro.org>, Rob Herring <robh+dt@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...glegroups.com
Subject: Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
> Allwinner A64 SoC features a NMI controller, which is usually connected
> to the AXP PMIC.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.io>
> Acked-by: Chen-Yu Tsai <wens@...e.org>
> ---
> Changes in v2:
> - Added Chen-Yu's ACK.
>
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 05ec9fc5e81f..53c18ca372ea 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -403,6 +403,14 @@
> <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + nmi_intc: interrupt-controller@...00c0c {
> + compatible = "allwinner,sun6i-a31-sc-nmi";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + reg = <0x01f00c0c 0x38>;
The base address is not correct, and there's uncertainty on whether
this is this particular controller or not. Did you even test this?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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