linux-kernel - Re: [PATCH] clk: tegra: fix SS control on PLL enable/disable

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Message-ID: <20170422023848.GJ7065@codeaurora.org>
Date:   Fri, 21 Apr 2017 19:38:48 -0700
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Peter De Schrijver <pdeschrijver@...dia.com>
Cc:     Prashant Gaikwad <pgaikwad@...dia.com>,
        Michael Turquette <mturquette@...libre.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: tegra: fix SS control on PLL enable/disable

On 04/20, Peter De Schrijver wrote:
> PLL SS was only controlled when setting the PLL rate, not when the PLL
> itself is enabled or disabled. This means that if the PLL rate was set
> before the PLL is enabled, SS will not be enabled, even when configured.
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@...dia.com>

Fixes tag? Or this isn't a problem right now, just future fix?

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