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Message-ID: <b3f2cbe5-4a1a-2f7b-2e4a-6a06eeadc890@nvidia.com>
Date: Tue, 25 Apr 2017 11:05:28 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Vivek Gautam <vivek.gautam@...eaurora.org>,
<p.zabel@...gutronix.de>, <swarren@...dotorg.org>,
<balbi@...nel.org>
CC: <linux-kernel@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-usb@...r.kernel.org>, <thierry.reding@...il.com>,
<gregkh@...uxfoundation.org>, <linux-arm-msm@...r.kernel.org>,
Thierry Reding <treding@...dia.com>
Subject: Re: [PATCH V3 4/4] soc/tegra: pmc: Use the new reset APIs to manage
reset controllers
On 25/04/17 05:15, Vivek Gautam wrote:
> On 04/24/2017 06:15 PM, Jon Hunter wrote:
>> On 18/04/17 12:21, Vivek Gautam wrote:
>>> Make use of reset_control_array_*() set of APIs to manage
>>> an array of reset controllers available with the device.
>> Before we apply this patch, I need to check to see if the order of the
>> resets managed by the PMC driver matter. Today the order of the resets
>> is determined by the order they appear in the DT node and although the
>> new APIs work in the same way they do not guarantee this. So let me
>> check to see if we can any concerns about ordering here. Otherwise would
>> be nice to use these APIs.
>
> Right, that will be perfect.
So I don't see any restrictions here and so I think this change is fine.
BTW, for the DT case, is there any reason why we don't just say the
order will be determine by the order the resets are list in the DT node?
Cheers
Jon
--
nvpublic
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