linux-kernel - Re: [PATCH] x86, msr: Better document AMD "tweak MSRs", rename MSR_F15H_IC

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Message-ID: <20170425125913.5nnd436dz54q7cld@pd.tnic>
Date:   Tue, 25 Apr 2017 14:59:13 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Denys Vlasenko <dvlasenk@...hat.com>
Cc:     Ingo Molnar <mingo@...hat.com>, Andy Lutomirski <luto@...nel.org>,
        Brian Gerst <brgerst@...il.com>,
        Peter Zijlstra <peterz@...radead.org>,
        "H. Peter Anvin" <hpa@...ux.intel.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86, msr: Better document AMD "tweak MSRs", rename
 MSR_F15H_IC_CFG

On Tue, Apr 25, 2017 at 02:16:55PM +0200, Denys Vlasenko wrote:
> However, all IBS registers are in this range.

I knew you were gonna say that. But IBS registers are architectural too
in the sense that they are behind a CPUID bit.

> DRi_ADDR_MASK are in this range - and these are very useful, likely to
> stay.

Those are too behind a CPUID bit.

> In the arch/x86/include/asm/msr-index.h file we already have
> three "tweak" MSRs defined with "AMD64":
> 
> #define MSR_AMD64_LS_CFG               0xc0011020
> #define MSR_AMD64_DC_CFG               0xc0011022
> #define MSR_AMD64_BU_CFG2              0xc001102a
> 
> I just noticed that we have a fourth one in
> arch/x86/kernel/cpu/amd.c:
> 
> #define MSR_AMD64_DE_CFG       0xC0011029

That's wrong. I think we should call those something else but not
"AMD64". Perhaps the families for which the workaround is being applied.
In the last case, MSR_F12H_DE_CFG, for example. And yes, I should've
paid attention to that but ...

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.