linux-kernel - Re: [PATCH] x86, msr: Better document AMD "tweak MSRs", rename MSR_F15H_IC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5ef2c044-3044-4983-61d7-68f651dd8ee9@redhat.com>
Date:   Tue, 25 Apr 2017 15:05:41 +0200
From:   Denys Vlasenko <dvlasenk@...hat.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     Ingo Molnar <mingo@...hat.com>, Andy Lutomirski <luto@...nel.org>,
        Brian Gerst <brgerst@...il.com>,
        Peter Zijlstra <peterz@...radead.org>,
        "H. Peter Anvin" <hpa@...ux.intel.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86, msr: Better document AMD "tweak MSRs", rename
 MSR_F15H_IC_CFG

On 04/25/2017 02:59 PM, Borislav Petkov wrote:
> On Tue, Apr 25, 2017 at 02:16:55PM +0200, Denys Vlasenko wrote:
>> However, all IBS registers are in this range.
>
> I knew you were gonna say that. But IBS registers are architectural too
> in the sense that they are behind a CPUID bit.
>
>> DRi_ADDR_MASK are in this range - and these are very useful, likely to
>> stay.
>
> Those are too behind a CPUID bit.
>
>> In the arch/x86/include/asm/msr-index.h file we already have
>> three "tweak" MSRs defined with "AMD64":
>>
>> #define MSR_AMD64_LS_CFG               0xc0011020
>> #define MSR_AMD64_DC_CFG               0xc0011022
>> #define MSR_AMD64_BU_CFG2              0xc001102a
>>
>> I just noticed that we have a fourth one in
>> arch/x86/kernel/cpu/amd.c:
>>
>> #define MSR_AMD64_DE_CFG       0xC0011029
>
> That's wrong. I think we should call those something else but not
> "AMD64".

Okay. Propose a naming scheme for these which looks god to you.


> Perhaps the families for which the workaround is being applied.
> In the last case, MSR_F12H_DE_CFG, for example. And yes, I should've
> paid attention to that but ...

A bit problematic:

MSR C001_1020 is used (mentioned in Rev Guides as a possible way
to work around an errata) by all Fams starting from K8, except Fam15h.

MSR C001_1022 is used by K8, 10h, 15h.

Etc...