linux-kernel - Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

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Message-ID: <20170503094717.GC8233@arm.com>
Date:   Wed, 3 May 2017 10:47:18 +0100
From:   Will Deacon <will.deacon@....com>
To:     Geetha Akula <geethasowjanya.akula@...il.com>
Cc:     Mark Rutland <mark.rutland@....com>,
        Geetha sowjanya <gakula@...iumnetworks.com>,
        robin.murphy@....com, lorenzo.pieralisi@....com,
        hanjun.guo@...aro.org, sudeep.holla@....com,
        iommu@...ts.linux-foundation.org, jcm@...hat.com,
        Linu Cherian <linu.cherian@...ium.com>,
        linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
        robert.richter@...ium.com, catalin.marinas@....com,
        Geetha <gakula@...ium.com>, sgoutham@...ium.com,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium
 ThunderX2 erratum #74

Hi Geetha,

On Tue, May 02, 2017 at 12:01:15PM +0530, Geetha Akula wrote:
> SMMU_IIDR register is broken on T99, that the reason we are using MIDR.

Urgh, that's unfortunate. In what way is it broken?

> If using MIDR is not accepted, can we enable errata based on SMMU resource size?
> some thing like below.

No, you need to get your model number added to IORT after all if the IIDR
can't uniqely identify the part.

Sorry,

Will