linux-kernel - Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 3 May 2017 16:02:34 +0530
From:   Geetha Akula <geethasowjanya.akula@...il.com>
To:     Will Deacon <will.deacon@....com>
Cc:     Mark Rutland <mark.rutland@....com>,
        Geetha sowjanya <gakula@...iumnetworks.com>,
        robin.murphy@....com, lorenzo.pieralisi@....com,
        Hanjun Guo <hanjun.guo@...aro.org>, sudeep.holla@....com,
        iommu@...ts.linux-foundation.org, jcm@...hat.com,
        Linu Cherian <linu.cherian@...ium.com>,
        linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
        robert.richter@...ium.com, catalin.marinas@....com,
        Geetha <gakula@...ium.com>, Sunil Goutham <sgoutham@...ium.com>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium
 ThunderX2 erratum #74

Hi Will,

We will resubmit the patches based on IORT.


Thank you,
Geetha.

On Wed, May 3, 2017 at 3:17 PM, Will Deacon <will.deacon@....com> wrote:
> Hi Geetha,
>
> On Tue, May 02, 2017 at 12:01:15PM +0530, Geetha Akula wrote:
>> SMMU_IIDR register is broken on T99, that the reason we are using MIDR.
>
> Urgh, that's unfortunate. In what way is it broken?
>
>> If using MIDR is not accepted, can we enable errata based on SMMU resource size?
>> some thing like below.
>
> No, you need to get your model number added to IORT after all if the IIDR
> can't uniqely identify the part.
>
> Sorry,
>
> Will