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Date:   Thu, 4 May 2017 16:40:10 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Icenowy Zheng <icenowy@...c.io>
Cc:     Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        linux-doc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: Re: [PATCH v2 02/10] pinctrl: sunxi: add definitions for add A20 and
 R40 support to A10 driver

On Thu, May 04, 2017 at 10:07:47PM +0800, Icenowy Zheng wrote:
> 
> 
> 于 2017年5月4日 GMT+08:00 下午10:04:31, Maxime Ripard <maxime.ripard@...e-electrons.com> 写到:
> >On Thu, May 04, 2017 at 09:49:58PM +0800, Icenowy Zheng wrote:
> >> Allwinner A10, A20 and R40 SoCs have similar GPIO layout.
> >> 
> >> Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support
> >> into A10 driver, and add R40 support into it.
> >
> >While your commit log is good, the commit title is misleading since
> >you're not adding it to the A10 driver. You just adding SoC IDs
> >definitions
> 
> Is "pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs" OK?

Yep, it is, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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