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Date:   Tue, 9 May 2017 00:45:48 -0700
From:   tip-bot for Xiaochen Shen <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     hpa@...or.com, tglx@...utronix.de, mingo@...nel.org,
        xiaochen.shen@...el.com, linux-kernel@...r.kernel.org,
        fenghua.yu@...el.com
Subject: [tip:x86/urgent] x86/intel_rdt: Fix a typo in Documentation

Commit-ID:  fb8fb46c56289b3f34b5d90a4ec65e9e4e4544a5
Gitweb:     http://git.kernel.org/tip/fb8fb46c56289b3f34b5d90a4ec65e9e4e4544a5
Author:     Xiaochen Shen <xiaochen.shen@...el.com>
AuthorDate: Wed, 3 May 2017 11:15:56 +0800
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Tue, 9 May 2017 09:41:42 +0200

x86/intel_rdt: Fix a typo in Documentation

Example 3 contains a typo:

"C0" in "# echo C0 > p0/cpus" is wrong because it specifies core
6-7 instead of wanted core 4-7.

Correct this typo to avoid confusion.

Signed-off-by: Xiaochen Shen <xiaochen.shen@...el.com>
Acked-by: Fenghua Yu <fenghua.yu@...el.com>
Cc: vikas.shivappa@...ux.intel.com
Cc: tony.luck@...el.com
Link: http://lkml.kernel.org/r/1493781356-24229-1-git-send-email-xiaochen.shen@intel.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>

---
 Documentation/x86/intel_rdt_ui.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86/intel_rdt_ui.txt
index 0f6d847..c491a1b 100644
--- a/Documentation/x86/intel_rdt_ui.txt
+++ b/Documentation/x86/intel_rdt_ui.txt
@@ -295,7 +295,7 @@ kernel and the tasks running there get 50% of the cache. They should
 also get 50% of memory bandwidth assuming that the cores 4-7 are SMT
 siblings and only the real time threads are scheduled on the cores 4-7.
 
-# echo C0 > p0/cpus
+# echo F0 > p0/cpus
 
 4) Locking between applications
 

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