linux-kernel - [PATCH v3 1/4] usb: dwc2: Define PCGCCTL1 register in hw.h

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Message-ID: <b1b1cae1-cec4-416e-846f-8043f389202a@US01WEHTC1.internal.synopsys.com>
Date:   Wed, 10 May 2017 16:26:38 +0400
From:   Razmik Karapetyan <Razmik.Karapetyan@...opsys.com>
To:     John Youn <John.Youn@...opsys.com>,
        Felipe Balbi <balbi@...nel.org>,
        "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
        <linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     Razmik Karapetyan <Razmik.Karapetyan@...opsys.com>
Subject: [PATCH v3 1/4] usb: dwc2: Define PCGCCTL1 register in hw.h

PCGCCTL1 (Power and Clock Control) register will be used
for controlling the core`s active clock gating feature.

Signed-off-by: Razmik Karapetyan <razmik@...opsys.com>
---
 drivers/usb/dwc2/hw.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
index 4592012c4743..b726701191f3 100644
--- a/drivers/usb/dwc2/hw.h
+++ b/drivers/usb/dwc2/hw.h
@@ -643,6 +643,10 @@
 #define PCGCTL_GATEHCLK			BIT(1)
 #define PCGCTL_STOPPCLK			BIT(0)
 
+#define PCGCCTL1                        HSOTG_REG(0xe04)
+#define PCGCCTL1_TIMER                  (0x3 << 1)
+#define PCGCCTL1_GATEEN                 BIT(0)
+
 #define EPFIFO(_a)			HSOTG_REG(0x1000 + ((_a) * 0x1000))
 
 /* Host Mode Registers */
-- 
2.11.0